Dr. Swagata Mandal is at present an Assistant Professor at Jalpaiguri Government Engineering College (Autonomous) in West Bengal, India. He received his Bachelor of Technology (B.TECH.) degree in Electronics and communication from West Bengal University of Technology (WBUT) in 2011, M.E. degree on Electronics & Telecommunication Communication Engineering from Bengal Engineering and Science University (Deemed University), now Indian Institute of Engineering, Science and Technology (IIEST), Shibpur, Howrah, India in 2013. He has done his Doctoral research on Development of FPGA based Error Resilient Self-Triggered Readout Chain for CBM Experiment at Variable Energy Cyclotron Centre Kolkata, 20013-2017. He was a Post-Doctoral fellow at the School of Computer Science Engineering, Nanyang Technological University, Singapore during 2017-2018. He is the recipient of DGFS-PhD fellowship for pursuing PhD in the area of Engineering Science from the Department of Atomic Energy, Govt. of India in 2013. He had received fellowship from different prestigious conferences like VLSID, ATS, ISVLSI etc. for presenting the paper. His research interests are: In memory Computation, VLSI design, Embedded System Design, Fault Tolerant System Design, Hardware cryptography, post quantum cryptography and hardware acceleration of CNN, DNN etc.

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RG or Scholar profile:

https://scholar.google.co.in/citations?user=qCzxYPUAAAAJ&hl=en